















before ccopt

after ccopt


DAG 有向无序图




減小insertion dealy 的好處: OCV影響減小,remove unnecessary buffer, 做短net
reduce clock power -- sizedown clk buffer balance clock tree reduce clock skew fix clock tree overload
balance clock tree
extract rc,update timing
polish -- improving clock skew resize clock gate
refine-placement
routing 之前都是 estimate routing, 真正routing 用NANOROUTE
update IO latency 做完clock tree routing以後 用實際delay propageted clock


fix clock cell

selectNet -clock



redo ccopt_design for testing ultra cmds medium or high effort focus on fixing timing, the skew will be greater than low effort, but the timing should be better than low effort. the potential risk should be hold timing due to an unbalanced tree.

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